FPGA-based Message Tracing for Various Communication Buses

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In order to do Non-Intrusive Runtime Verification (RV) we are using program trace technology of modern CPUs. The program trace stream is then processed on an FPGA which runs RV monitors. The goal of this thesis is to extend this approach to various communication buses, e.g. CAN and I2C, and implement FPGA-based to trace those buses.

Problem Statement
Our current setup uses the program trace of different CPUs as input stream for the RV monitors running on an FPGA. The FPGA performs two tasks: Interpreting and reconstruction the program trace and executing the RV monitors. This monitors are specified in a high-level specification language and then compiled to an intermediate language that is interpreted on the FPGA. The goal of this thesis is to extend this approach: We want to monitor systems consisting of multiple CPUs and periphery communicating through communication buses like CAN [1] and I2C [2]. In order to do that we need to trace the messages on the bus and feed those into the monitoring stage of the FPGA alongside the program trace of the CPUs we are watching.

Goals

  • Work your way into FPGA programming and the various communication buses.
  • Implement the tracing interface on our FPGA hardware and integrate it with the monitoring stage.
  • Run practical tests with different setups.

Requirements

  • You have some knowledge in FPGA programming with SystemVerilog.
  • You are not afraid of manually analyzing low level technology.
  • You want to run practical experiments with sophisticated hardware setups.

COEMS
The COEMS project is a European project with international academic and indus- trial partners from Norway, Romania, Austria and Germany. This thesis can be done in com- bination with an ERASMUS stay in Norway.

Literature
[1] ISO 11898-1:2015 Road vehicles – Controller area network (CAN) – Part 1: Data link layer and physical signaling
[2] UM10204: I2C-bus specification and user manual, NXP